Spi bus protocol pdf

Single Master to Single Slave: basic SPI bus example. The interface was developed by Motorola in the late spi bus protocol pdf and has become a de facto standard. Typical applications include Secure Digital cards and liquid crystal displays.


SPI devices communicate in full duplex mode using a master-slave architecture with a single master. The master device originates the frame for reading and writing. Sometimes SPI is called a four-wire serial bus, contrasting with three-, two-, and one-wire serial buses.

SSI Protocol employs differential signaling and provides only a single simplex communication channel. MOSI: SIMO, SDO, DI, DIN, SI, MTSR. MISO: SOMI, SDI, DO, DOUT, SO, MRST. MISO convention requires that, on devices using the alternate names, SDI on the master be connected to SDI on the slave, and vice versa.

Slave Select is the same functionality as chip select and is used instead of an addressing concept. Pin names are always capitalized as in Slave Select, Serial Clock, and Master Output Slave Input. The SPI bus can operate with a single master device and with one or more slave devices. If a single slave device is used, the SS pin may be fixed to logic low if the slave permits it.

Some slaves require a falling edge of the chip select signal to initiate an action. With multiple slave devices, an independent SS signal is required from the master for each slave device. To begin communication, the bus master configures the clock, using a frequency supported by the slave device, typically up to a few MHz. The master then selects the slave device with a logic level 0 on the select line.

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